Associate III - VLSI

Associate III - VLSI

UST Global Singapore Pte Limited
Malaysia
Not Specified
Not Specified

Job Description


Job Description :
Role Proficiency:
Ability to e xecute any small to mid customer project in any field of VLSI Frontend Backend or Analog design with minimal supervision
Outcomes:
  1. Work as an individual contributor to own any one task of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc.
  2. Independently analyze and complete the assigned task in the defined domain(s) successfully and on-time
  3. On time quality delivery approved by the project lead/manager

Measures of Outcomes:
  1. Quality –verified using relevant metrics by Lead/Manager
  2. Timely delivery - verified using relevant metrics by Lead/Manager
  3. Reduction in cycle time and cost using innovative approaches
  4. Number of trainings attended
  5. Number of new projects handled

Outputs Expected:
Quality of the deliverables:
  1. Ensure clean delivery of the design and module in-terms of ease in integration at the top level
  2. Meet functional spec / design guidelines 100% of the time without any deviation or limitation
  3. Documentation of the tasks and work performed

Timely delivery:
  1. Meeting project timelines as requested by the program manager
  2. Support the team lead in intermediate tasks delivery

Team Work:
  1. Participation in team work; supporting team members/lead at the time of need
  2. Able to perform additional tasks in-case any team member(s) is not available

Innovation & Creativity:
  1. Automate repeated tasks to save design cycle time as a necessary approach
  2. Participation in technical discussion training forum

Skill Examples:
  1. Languages and Programming skills:a. System Verilog Verilog VHDL UVM C C++ Assembly Perl TCL/TK Makefile Spice (any one)
  2. EDA Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus Calibre etc. (any one)
  3. Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verificationb. Strong in Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec. Strong knowledge in Physical Design / Circuit Design / Analog Layout d. Strong understanding of Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Strong knowledge of Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design
  4. Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below
  5. Strong communication skills
  6. Good analytical reasoning and problem-solving skills with attention to details
  7. Able to deliver the tasks on-time per quality guidelines and GANTT in every instance.
  8. Required technical skills and prior design knowledge to execute the assigned tasks
  9. Ability to learn new skills in-case required technical skills are not present to a level needed to execute the project

Knowledge Examples:
Knowledge Examples
  1. Frontend / Backend / Analog Design:a. Project experience in any of the design by executing any one of – RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc.b. Strong understanding of the design flow and methodologies used in designing
  2. Understanding of the technical specs and assigned tasks:
  3. Understand the assigned tasks and have strong knowledge to execute the project tasks assigned by the client / manager as per shown skill

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