Senior Analog Design Engineer

Senior Analog Design Engineer

Penang Malaysia
10-13 years
Not Specified

Job Description

Job Description :
Job Description
In this role of analog circuit design engineer tech lead, your responsibilities will include, but not be limited to:
- Micro architecture innovation to resolve power, performance and area design challenges to meet design specification.
- Innovate and Design of mixed-signal circuits such as High Speed TX,RX, Equalization circuitry, Clock Alignment, DLL, Clock distribution design, ON-Die VREG/LDO, RCOMP/SCOMP and VREF blocks to meet architectural specifications.
- Own design verification plans covering functionality, performance and reliability meeting high volume productization requirement.
- Design and deliver circuit building block schematic, perform pre layout and post layout design optimization to meet design specification across PVT, process variation sensitivity analysis, aging, RV checks for design reliability.
- Collateral generations like Circuit Integration Spec, BMOD, timing lib files, ICCT, IBIS, alpha numbers.
- Collaborate with custom layout engineer, logic designer, logic verification designer, structural physical design engineers, signal integrity and power deliver engineer to define clear collateral handoff requirements to ensure efficient IP integration.
- Perform post silicon data analysis and debug and make necessary design enhancement to meet design specification.
- Proven track record on design of high speed analog and mixed-signal design for DDR4/LP4/DDR5/LP5 DDR PHYs with involvement definition to productization on at least 3 full projects.
- Good understanding of design for yield and exposure to production challenges in latest technology process node. Prefer design knowledge of 20nm and below.
- Experience with industry standard tools for Analog design such as Cadence ADE, Spectre, AMS verification, FEV, StarRC etc..
- Cross-discipline knowledge in any of these areas, such as Analog integration, RTL/System Verilog, Static timing analysis concepts, APR, Floor-planning, Metal-routing, Power-grid, Memory IO training MRC and HAS/MAS specification documentation.
- Strong written and oral communication skills.
- Positive attitude and team player.
- BSEE with 10+ years relevant experience or Master's with 8+ years relevant experience required. Education Focus should include integrated circuit design and analog design.Inside this Business Group
The Infrastructure and Platform Solutions Group (IPSG) builds the silicon and platform infrastructure for Intel's silicon design teams. IPSG is comprised of a reusable pool of infrastructure IP blocks, design enabling services such as tools and automation, and a best-in-class post silicon ecosystem that ramps quickly to high volume manufacturing and validation. Our primary mission is to protect Intel's brand by providing the infrastructure necessary to enable all of Intel's products to hit the market on a dependable and predictable cadence.

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