Senior Pre-Silicon Verification Engineer

Senior Pre-Silicon Verification Engineer

Intel
Penang Malaysia
Not Specified
Not Specified

Job Description


Job Description :
Job Description
Intel PSG offers a large selection of intellectual property IP cores optimized for Intel FPGA devices, all of which are developed for highest performance, lowest cost, ease of use and fastest time-to-market. The Custom IP Engineering Solution group is responsible for High Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA emulation prototyping and hardware validation using Quartus Development Kit. As an IP Design Engineer focusing on Soft IP and sub system Verification and Validation, you will be responsible for carrying out design validation for Intel next generation IP's across the Intel FPGA IP product portfolios. The charter of IP and subsystem verification and validation team is to verify and validate the IP for robust functionality from functional simulation, FPGA emulation prototyping, hardware to complex system level environment. The verification and validation areas encompass IP and Subsystem for high-speed transceiver protocols eg. PCIe, Ethernet, Interlaken, JESD204, Serial Lite, CPRI and more 5G IPs (eCPRI, ORAN).
Qualifications
  • Bachelor's degree in Electrical, Electronics, Computer Engineering or equivalent.
  • Experience in FPGA, custom IC or ASIC design and/or verification, demonstrated excellence in any of the product development areas from architecture, design, validation to product.
  • Experienced using advanced system design and validation methodologies and technologies such as FPGA prototyping, emulation, simulation and co-emulation.
  • Experienced using advanced verification methodologies such as UVM, OVM, VMM, System Verilog, constrained-random verification, assertion-based verification, and functional coverage techniques is a strong plus.
  • Experienced creating and executing validation plans.
  • Experience of leading a verification or validation team is a strong plus.
  • Familiarity or experience in RTL design with Verilog and/or VHDL is a strong plus.
  • Familiarity or experience in embedded SW and HW design is a strong plus.
  • Knowledge of any memory interface protocol such as DDR, HBM or high speed serial system interfaces such as PCIe, Ethernet, IEEE 1588, JESD204, Interlaken, Serial Lite or CPRI is a strong plus.
  • Familiarity with Perl, TCL and shell scripts is a plus.
  • Familiarity with Intel Quartus or Xilinx Vivado is a plus.
  • Highly motivated to learn and adapt to fast-changing technologies and environments.
  • Exceptional analytical, problem solving and communication skills, initiative, promote innovation and teamwork.
  • Self-motivated and ability to excel in a team environment.
  • Demonstrates fundamental values such as accountability, integrity and a winning mindset.
Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

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