SoC Design Graduate Trainee

SoC Design Graduate Trainee

Intel
Not Specified
Not Specified

Job Description


Job Description :
Job Description
Responsibilities may be quite diverse of a technical nature. U.S. experience and education requirements will vary significantly depending on the unique needs of the job. Job assignments are usually for the summer or for short periods during breaks from school.
Qualifications
SOC Design Graduate Trainee Job Description At Custom Logic Engineering (CLE) group, we engineer solutions for our customers greatest challenges with reliable, cloud to edge computing, inspired by Moore's Law. We drive innovation that creates building blocks and eventually the SOC designs that bring values to Server, Networking, Data Center, Cloud and ASIC market segments. As part of the SOC design team the Design Productivity Solution (DPS) SOC design graduate trainees develop and implement technical solutions to designer problems for enabling a successful SOC project. You get to focus on a domain from the multiple aspects of RTL to GDS (R2G) implementation and signoff flows including but not limited to synthesis, floorplan, auto place/route, custom polygon, abstraction view, formal equivalence, chip assembly, static timing, clocking, parasitic view, design rule, layout-vs-schematic, reliability, etc. You help to drive and deliver R2G design kits in different flavors based on the internal and external process technologies. You are also encouraged to innovate and explore the next generation solutions by leveraging artificial intelligence (AI) and machine learning (ML) for structural physical design quality and efficiency improvements. Serving as a trusted technical advisor you remove the critical execution obstacles for a SOC project milestone thru direct project involvement. In this position you will work closely with the SOC design teams in troubleshooting a wide variety of design challenges, in providing proactive intervention with respect to the design tools, flows and methodologies (TFM), in determining a proper R2G strategy for new design, in gauging feedback from customers, in negotiating the upstream (or suppliers) constraints, and finally in driving any paradigm shifts needed in structural physical design execution. Minimum Qualifications Bachelor of Science degree or Master of Science degree in Electrical/Electronic Engineering, Computer Engineering or Computer Science (with hardware design focus). Knowledge of programming language such as Perl, Python, Linux/Unix shell script and TCL. Preferred Qualifications Behavioral traits including but not limited to strong communication skills (written and verbal), tolerance of ambiguity, problem solving, teamwork, attention to detail, commitment to task, and quality focus. Knowledge of EDA industry R2G TFM such as Fusion, Formality, ICV, PrimeTime, PrimePower, StarRC, RedHawk, Calibre, etc. Knowledge of artificial intelligence (AI) and machine learning (ML).Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

About Intel

Job Source : jobs.intel.com

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